Home / Advanced Search

  • Title/Keywords

  • Author/Affliations

  • Journal

  • Article Type

  • Start Year

  • End Year

Update SearchingClear
  • Articles
  • Online
Search Results (12)
  • Open Access

    ARTICLE

    Control System Design for Low Power Magnetic Bearings in a Flywheel Energy Storage System

    Tinnawat Hongphan1, Matthew O. T. Cole1,*, Chakkapong Chamroon1, Ziv Brand2

    Energy Engineering, Vol.120, No.1, pp. 147-161, 2023, DOI:10.32604/ee.2022.022821

    Abstract This paper presents a theoretical and experimental study on controller design for the AMBs in a small-scale flywheel energy storage system, where the main goals are to achieve low energy consumption and improved rotordynamic stability. A H-infinity optimal control synthesis procedure is defined for the permanent-magnet-biased AMB-rotor system with 4 degrees of freedom. Through the choice of design weighting functions, notch filter characteristics are incorporated within the controller to reduce AMB current components caused by rotor vibration at the synchronous frequency and higher harmonics. Experimental tests are used to validate the controller design methodology and provide comparative results on performance… More >

  • Open Access

    ARTICLE

    An Optimized Deep-Learning-Based Low Power Approximate Multiplier Design

    M. Usharani1,*, B. Sakthivel2, S. Gayathri Priya3, T. Nagalakshmi4, J. Shirisha5

    Computer Systems Science and Engineering, Vol.44, No.2, pp. 1647-1657, 2023, DOI:10.32604/csse.2023.027744

    Abstract Approximate computing is a popular field for low power consumption that is used in several applications like image processing, video processing, multimedia and data mining. This Approximate computing is majorly performed with an arithmetic circuit particular with a multiplier. The multiplier is the most essential element used for approximate computing where the power consumption is majorly based on its performance. There are several researchers are worked on the approximate multiplier for power reduction for a few decades, but the design of low power approximate multiplier is not so easy. This seems a bigger challenge for digital industries to design an… More >

  • Open Access

    ARTICLE

    Process Tolerant and Power Efficient SRAM Cell for Internet of Things Applications

    T. G. Sargunam1,2,*, Lim Way Soong1, C. M. R. Prabhu1, Ajay Kumar Singh3

    CMC-Computers, Materials & Continua, Vol.72, No.2, pp. 3425-3446, 2022, DOI:10.32604/cmc.2022.023452

    Abstract The use of Internet of Things (IoT) applications become dominant in many systems. Its on-chip data processing and computations are also increasing consistently. The battery enabled and low leakage memory system at subthreshold regime is a critical requirement for these IoT applications. The cache memory designed on Static Random-Access Memory (SRAM) cell with features such as low power, high speed, and process tolerance are highly important for the IoT memory system. Therefore, a process tolerant SRAM cell with low power, improved delay and better stability is presented in this research paper. The proposed cell comprises 11 transistors designed with symmetric… More >

  • Open Access

    ARTICLE

    An Energy-Efficient 12b 2.56 MS/s SAR ADC Using Successive Scaling of Reference Voltages

    Hojin Kang1, Syed Asmat Ali Shah2, HyungWon Kim1,*

    CMC-Computers, Materials & Continua, Vol.72, No.1, pp. 2127-2139, 2022, DOI:10.32604/cmc.2022.025798

    Abstract This paper presents an energy efficient architecture for successive approximation register (SAR) analog to digital converter (ADC). SAR ADCs with a capacitor array structure have been widely used because of its simple architecture and relatively high speed. However, conventional SAR ADCs consume relatively high energy due to the large number of capacitors used in the capacitor array and their sizes scaled up along with the number of bits. The proposed architecture reduces the energy consumption as well as the capacitor size by employing a new array architecture that scales down the reference voltages instead of scaling up the capacitor sizes.… More >

  • Open Access

    ARTICLE

    Design of Low Power Transmission Gate Based 9T SRAM Cell

    S. Rooban1, Moru Leela1, Md. Zia Ur Rahman1,*, N. Subbulakshmi2, R. Manimegalai3

    CMC-Computers, Materials & Continua, Vol.72, No.1, pp. 1309-1321, 2022, DOI:10.32604/cmc.2022.023934

    Abstract Considerable research has considered the design of low-power and high-speed devices. Designing integrated circuits with low-power consumption is an important issue due to the rapid growth of high-speed devices. Embedded static random-access memory (SRAM) units are necessary components in fast mobile computing. Traditional SRAM cells are more energy-consuming and with lower performances. The major constraints in SRAM cells are their reliability and low power. The objectives of the proposed method are to provide a high read stability, low energy consumption, and better writing abilities. A transmission gate-based multi-threshold single-ended Schmitt trigger (ST) 9T SRAM cell in a bit-interleaving structure without… More >

  • Open Access

    ARTICLE

    Machine Learning-Based Pruning Technique for Low Power Approximate Computing

    B. Sakthivel1,*, K. Jayaram2, N. Manikanda Devarajan3, S. Mahaboob Basha4, S. Rajapriya5

    Computer Systems Science and Engineering, Vol.42, No.1, pp. 397-406, 2022, DOI:10.32604/csse.2022.021637

    Abstract Approximate Computing is a low power achieving technique that offers an additional degree of freedom to design digital circuits. Pruning is one of the types of approximate circuit design technique which removes logic gates or wires in the circuit to reduce power consumption with minimal insertion of error. In this work, a novel machine learning (ML) -based pruning technique is introduced to design digital circuits. The machine-learning algorithm of the random forest decision tree is used to prune nodes selectively based on their input pattern. In addition, an error compensation value is added to the original output to reduce an… More >

  • Open Access

    ARTICLE

    Performance Analysis of Low Power Interference Cancellation Architecture for OFDM System

    N. Manikanda Devarajan1,*, S. Thenmozhi2, K. Jayaram3, R. Saravanakumar4

    Intelligent Automation & Soft Computing, Vol.32, No.2, pp. 1167-1178, 2022, DOI:10.32604/iasc.2022.021558

    Abstract Orthogonal Frequency Division Multiplexing (OFDM) is a wireless communication technology that is used for highly reliable and high data rate communication. In a multi-user OFDM system, the interference has occurred in the receiver side between the consecutive OFDM symbols. This interference reduces the performance of the OFDM system. To achieve good quality in received symbols the interference level should be minimized. The conventional cancellation system requires higher interference reduction time and power. These limitations of the conventional interference cancellation architectures for OFDM systems are overcome by proposing efficient and low power interference cancellation architecture. Hence, this paper proposes a novel… More >

  • Open Access

    ARTICLE

    IIoT Framework Based ML Model to Improve Automobile Industry Product

    S. Gopalakrishnan1,*, M. Senthil Kumaran2

    Intelligent Automation & Soft Computing, Vol.31, No.3, pp. 1435-1449, 2022, DOI:10.32604/iasc.2022.020660

    Abstract In the automotive industry, multiple predictive maintenance units run behind the scenes in every production process to support significant product development, particularly among Accessories Manufacturers (AMs). As a result, they wish to maintain a positive relationship with vehicle manufacturers by providing 100 percent quality assurances for accessories. This is only achievable if they implement an effective anticipatory strategy that prioritizes quality control before and after product development. To do this, many sensors devices are interconnected in the production area to collect operational data (humanity, viscosity, and force) continuously received from machines and sent to backend computers for control operations and… More >

  • Open Access

    ARTICLE

    Design and Analysis of 4-bit 1.2GS/s Low Power CMOS Clocked Flash ADC

    G. Prathiba1,*, M. Santhi2

    Intelligent Automation & Soft Computing, Vol.31, No.3, pp. 1611-1626, 2022, DOI:10.32604/iasc.2022.018975

    Abstract High-quality, high-resolution flash ADCs are used in reliable VLSI (Very Large-Scale Integrated) circuits to minimize the power consumption. An analogue electrical signal is converted into a discrete-valued sequence by these ADCs. This paper proposes a four-bit 1.2GS/s low-power Clocked Flash ADC (C-FADC). A low-power Clocked-Improved Threshold Inverter Quantization (CITIQ) comparator, an Adaptive Bubble Free (ABF) logic circuit, and a compact Binary Encoder (BE) are all part of the presented structure. A clock network in the comparator circuit reduces skew and jitters, while an ABF logic circuit detects and corrects fourth order bubble faults detected from thermometer code, and then the… More >

  • Open Access

    ARTICLE

    An Overview of the Miniaturization and Endurance for Wearable Devices

    Zhoulei Cao1, Qijun Wen1, Xiaoliang Wang1,*, Qing Yang1, Frank Jiang2

    Journal on Internet of Things, Vol.3, No.1, pp. 11-17, 2021, DOI:10.32604/jiot.2021.010404

    Abstract The miniaturization and endurance of wearable devices have been the research direction for a long time. With the development of nanotechnology and the emergence of microelectronics products, people have explored many new strategies that may be applied to wearable devices. In this overview, we will summarize the recent research of wearable devices in these two directions, and summarize some available related technologies. More >

Displaying 1-10 on page 1 of 12. Per Page  

Share Link